数字电路课程设计报告-同步N进制计数器的设计与仿真

·····················································Р·····················1Р5Р6 心得体Р会···············································································································Р·Р·Р·Р·Р·Р·Р·РРРРРРРРРРРРРР·Р·Р·Р·Р·Р·Р·Р·Р1Р5Р附：参考文Р献 ··············································································································Р·Р·Р·Р·Р·Р·Р·РРРРРРРРРРРРРР·Р·Р·Р·Р1Р6Р Р Р同步N进制计数器的设计与仿真Р Р摘 要：本课程设计首先从一般方法入手，介绍了同步时序电路设计的方法过程，然后将此方法Р应用于同步二进制电路的设计，再在同步二进制计数器的根底上进展分析给出十三进制电路状态方程、卡诺图，得到带进位输出端得十三进制计数器的设计，最终用MUX+plus2对所得电路进展仿真，验证设计，并对电路延时等性能进展分析。Р关键词： 同步时序逻辑电路，同步二进制计数器，带进位输出端得十三进制计数器，MUX+plus2Р РSynchronous N into system design and simulation of the counterРAbstract: Our course is designed from the general method of first, which introduced the synchronization