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(eda)基于vhdl语言的数字时钟设计说明书

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#30# )then count<=count+7; elsif (count<16#30#) then count<=count+1; else count<="000001";dount<=dount+1; end if; elsif(clk 'event and clk='1' and dount="01010" )then if(count(3 downto 0)="1001") and (count<16#31# )then count<=count+7; elsif (count<16#31#) then count<=count+1; else count<="000001";dount<=dount+1;end if; elsif(clk 'event and clk='1' and dount="01011" )then if(count(3 downto 0)="1001") and (count<16#30# )then count<=count+7; elsif (count<16#30#) then count<=count+1; else count<="000001";dount<=dount+1; end if; elsif(clk 'event and clk='1' and dount="01100" )then if(count(3 downto 0)="1001") and (count<16#31# )then count<=count+7; elsif (count<16#31#) then count<=count+1; else count<="000001";dount<=dount+1;end if;end if; end process; monthout<=dount; dateout<=count; end fun;

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