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基于FPGA的8位数码管扫描显示电路设计

上传者:学习一点 |  格式:doc  |  页数:7 |  大小:0KB

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1164.ALL;USEIEEE.STD_LOGIC_UNSIGNED.ALL;ENTITYSCAN_LEDIS?PORT(CLK:INSTD_LOGIC;?A1,A2,A3:INSTD_LOGIC_VECTOR(3DOWNTO0); SG:OUTSTD_LOGIC_VECTOR(6DOWNTO0);?BT:OUTSTD_LOGIC_VECTOR(7DOWNTO0));?END;?ARCHITECTUREoneOFSCAN_LEDIS?T4:STD_LOGIC_VECTOR(1DOWNTO0);SIGNALA:STD_LOGIC_VECTOR(3DOWNTO0);?BEGIN?P1:T4)?BEGIN?T4IS?WHEN"00"=>BT<="";A<=A1;?WHEN"01"=>BT<="";A<=A2;?WHEN"10"=>BT<="";A<=A3; WHENOTHERS=>NULL;?ENDCASE;?ENDPROCESSP1;?P2:PROCESS(CLK)?BEGIN?IFCLK'EVENTANDCLK='1'T4<=CNT4+1;?T4="10"T4<="00";?ENDIF;?ENDIF;?ENDPROCESSP2;?P3:PROCESS(A)?BEGIN?CASEAIS?WHEN"0000"=>SG<="";WHEN"0001"=>SG<="";?WHEN"0010"=>SG<="";WHEN"0011"=>SG<="";?WHEN"0100"=>SG<="";WHEN"0101"=>SG<="";?WHEN"0110"=>SG<="";WHEN"0111"=>SG<="";?WHEN"1000"=>SG<="";WHEN"1001"=>SG<=""; WHENOTHERS=>NULL;?ENDCASE;?ENDPROCESSP3;END;(2)顶层文件原理图

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