_a else PC<=PC_tРIR<=Dread РPC_t<=PC+1Р11、JNZ ADRР t1 t2 t3РMadd<=pc generate if c_z_j_f=1РR/W<=1 c_z_j_f then PC<=sjmp_aРDread<=ob sjmp_a else PC<=PC_tРIR<=Dread РPC_t<=PC+1Р12、MVRD DR,DATAР t1 t2 t3РMadd<=pc Madd<= PC_t R/W=1 Р R/W<=1 Dread<=obРDread<=ob DR<=DreadРIR<=Dread PC<=PC+2 РPC_t<=PC+1Р13、LRD DR,SRР t1 t2 t3РMadd<=pc Madd<= SR R/W=1 Р R/W<=1 Dread<=obРDread<=ob DR<=DreadРIR<=Dread PC<=PC_t РPC_t<=PC+1Р14、STR SR,DRР t1 t2 t3РMadd<=pc Madd<= DR R/W=0 Р R/W<=1 ob<=SRРDread<=ob РIR<=Dread PC<=PC_t РPC_t<=PC+1Р15、NOPР t1 t2 t3РMadd<=pc Р R/W<=1 РDread<=ob РIR<=Dread PC<=PC_t РPC_t<=PC+1Р说明:РMem_Addr是存储器地址总线。РOb是存储器数据总线。РWe是存储器读写信号,为0时写存储器,为1时读存储器。РZ_tmp是运算产生的结果为0的标志,z_out是本条指令执行完成后的结果为0的标志。РC_tem是运算产生的进位标志,c_out是本条指令执行完成后的进位标志。РIR是指令寄存器。РC_z_j_flag是条件转移指令“JNC ADR”或者“JNZ ADR”产生的条件转移指令
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