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电子工程师面试题合集.

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笔试试题) 23、化简 F(A,B,C,D)= m(1,3,4,5,10,11,12,13,14,15) 的和。(威盛) 24、 please show the CMOS inverter schmatic,layout and its cross sectionwith P- well process.Plot its transfer curve (Vout-Vin) And also explain the operation region of PMOS and NMOS for each segment of the transfer curve? ( 威盛笔试题 circuit design-beijing-03.11.09 ) 25、 To design a CMOS invertor with balance rise and fall time,please define the ration of channel width of PMOS and NMOS and explain? 26 、为什么一个标准的倒相器中 P 管的宽长比要比 N 管的宽长比大?(仕兰微电子) 27、用 mos 管搭出一个二输入与非门。(扬智电子笔试) 28、 please draw the transistor level schematic ofa cmos 2 input AND gate and explain which input has faster response for output rising edge.(less delay time) 。( 威盛笔试题 circuit design-beijing-03.11.09 ) 29 、画出 NOT,NAND,NOR 的符号,真值表,还有 transistor level 的电路。( Infineon 笔试)

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